IC Design

CENTIC IP Core Products

Centic offers the wide range of security and compression solutions for use in ASIC or FPGA, allowing the smallest, fastest, lowest-power and the best possible performance out of the systems. Centic promises to provide a reasonable solution and well supported for any requirements

 

1. Introduction

Centic offers the wide range of security and compression solutions for use in ASIC or FPGA, allowing the smallest, fastest, lowest-power and the best possible performance out of the systems. Centic promises to provide a reasonable solution and well supported for any requirements.

Encryption

AES

AES-XTS

Authentication & Hashing

 

SHA-1 & MD5

SHA-256, SHA-384, SHA-512

Combined Encryption & Authentication

AES-CCM

AES-GCM

Security Application

IPSec

 

2. Encryption core

Encryption algorithms are commonly used for data protection in transit and are the center of security protocols such as IPSec or SSL, providing high data throughput capabilities for small footprint.These encryption cores were used with secured keys at each side of the link for high level of security. Centic delivers these algorithms to represent the fastest and most efficient solutions needed.

2.1 AES

Centic offers AES IP core with basic operating modes such as CBC, CFB, OFB and CTR, allow the most efficience for your applications which is up to 10Gbps. Additionally, mode operation is also enhanced between encryption and authentication (AES-CCM, AES-GCM) as well as encrypted storage devices (AES-XTS).

Specification:

- AES algorithm(Rijndael) is based on the latest standards NIST FIPS PUB 197

- Operating mode with 128-192-256 bits key

- Maximum speed up to 10Gbps

- Multiple operating modes CBC, OFB, CFB, CTR, CCM, GCM, XTS

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2.2 AES-XTS

Our AES-XTS solutions allow the best utilization for hardware acceleration based on user’s demand, minize the amount of logic resources required, include all the data speed’s excess from less than 1Gbps to more than 64Gbps in any target technology.

Specification:

- AES-XTS mode operation is specified by IEEE 1619 standard

- Support activities AES-CBC mode for storage applications

- Auto-tuned performance computing andciphertext stealing

- XTS mode supports key size of 256-bits and 512-bits

- CBC mode supports key size of 128-bits, 192-bits and 256-bits

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3. Authentication and Hashing

Centic IP core offers authentication (HMAC) and corresponding hash function SHA, SHA-1, SHA-2 family and MD5. Our solutions work up to 4Gbps speed fast, easy to use and consume less resources and energy.

Specification:

- Perform more than one algorithm SHA-1, SHA-2 và MD5

- High speed – each clock cycle for a hash

- Auto-calculate and insert padding

- Optional vector IVs for HMAC

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4. Combined Encryption and Authentication

These solutions provide the security and authentication based on only one algorithm, they are used in many wireless standards, network storage in recent market. Centic’ IP cores meet the requirements about the speed and system performance.

Specification:

- Implement Counter mode authentication according to NIST 800-38C

- Support AES with 128-bits, 192-bitsvà 256-bits

- Implement all CCM such as Counter management, block chaining, block masking, tag appending and checking

- Be suitable for wireless application 802.11, 802.15 và 802.16

- Implement encrypted authentication mode Galois/Counter (GCM) under NIST 800-38D

- Support 96-bits Nonce/IV

- Implement AES algorithm and GHASH required for GCM including final block, padding, tag appending and checking.

5. Security application

Centic offer IP cores solution for security implementation from data link layer to the transport layer in network applications. These solutions include accelerated algorithms for encryption and authentication protocols IPsec and SSL/TLS to ensure data transfer over the Internet.

5.1 Internet Protocol Security – IPSec

Centic provides ESP IP core by implement ESP in IPSec hardware to maximize the speed the coding process and authentication as well as IP packet encapsulation, resources and lower energy consumption. In addition to maximize the speed, implementation ESP by hardware is better for CPU control system with complicated tasks than software. Centic’s ESP IP core architecture support any encryption algorithm and authentication which is specified in RFC 4303, RFC 4835 and other RFC.

Specification: 

- Implement ESP IPSecprotocol using RFC 4303 

- Fully support configurable seciruty protocols, authentication and proposal in ESP-v3 

- Compatible with IPv4, IPv6 andIPSec transport mode operation as well as Tunnel 

- Perform Extended (64-bits) Sequence Number for IKEv2 management protocol 

- Fully support security service ESP 

- Support Traffic Flow Confidentiality (TFC)

- Implement and test auto padding

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