IC Design

PCI Express to SATA converter project



1. General Description:

The PCIe to Sata converter provides an interface high-speeddata transferbetween thePCI e andSATA. In the PCIe to Sata converter have two IP core: PCI Express Endpoint block and SATA host controller

2. PCIe IP core features :

-          Compatible with the PCI Express Base 1.1 and 2.0 Specification

-          Endpoint block or Legacy Endpoint block for PCI Express designs

-          upports x1, x2, and x4 lane

-          RocketIO™ GTP transceivers implement a fully compliant PHY

-          Block RAMs used for buffering

-          Fully buffered Transmit and Receive

-          Management interface to access configuration space and internal configuration

-          Full range of maximum payload size (128 to 512 bytes) supported

-          Up to two virtual channels (VCs)

-          Round robin, weighted round robin, or strict priority VC arbitration

-          BARs configurable for I/O or Memory

-          Signals to the fabric for statistics and monitoring

3. SATA IP core features :

-          Compliant with SATA 1.5-Gbps, 3.0-Gbps, and 6.0-Gbps industry specifications

-          Transport, advanced host controller interface (AHCI), or Application (AHCI-Lite) interface options

-          Supports either serializer/deserializer (SERDES) or PHY interface

-          Synchronous design for easy integration

-          Synthesizable Verilog design

-          Protocol interface is compliant with the SATA 3.0 specification defined by the SATA-IO

-          48-bit address feature set supported

-          8b/10b coding and decoding

-          CONT and data scramblers to reduce EMI

-          CRC generation and checking

-          Auto inserted HOLD primitives

-          Power management support (partial and slumber)

-          Optional native mode programming model

4. Block diagram

pci express sata

Block diagram of PCIe_SATA